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d a t a sh eet product speci?cation file under integrated circuits, ic06 1998 aug 05 integrated circuits 74hc1g86; 74hct1g86 2-input exclusive-or gate
1998 aug 05 2 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 features wide operating voltage range: 2.0 to 6.0 v symmetrical output impedance high noise immunity low power dissipation balanced propagation delays very small 5 pins package output capability: standard. description the 74hc1g/hct1g86 is a high-speed si-gate cmos device. the 74hc1g/hct1g86 provides the 2-input exclusive-or function. the standard output currents are 1 2 compared to the 74hc/hct86. function table see note 1. note 1. h = high voltage level; l = low voltage level. inputs output ina inb outy ll l lh h hl h hh l quick reference data gnd = 0 v; t amb =25 c; t r =t f = 6.0 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i + ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; ? (c l v cc 2 f o ) = sum of outputs. 2. for hc1g the condition is v i = gnd to v cc ; for hct1g the condition is v i = gnd to v cc - 1.5 v. pinning symbol parameter conditions typ. unit hc1g hct1g t phl / t plh propagation delay ina, inb to outy c l =15pf v cc =5v 910ns c i input capacitance 1.5 1.5 pf c pd power dissipation capacitance notes 1 and 2 23 23 pf pin symbol description 1 and 2 inb, ina data inputs 3 gnd ground (0 v) 4 outy data output 5v cc dc supply voltage
1998 aug 05 3 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 ordering and package information outside north america packages temperature range pins package material code marking 74hc1g86gw - 40 to +125 c 5 sc-88a plastic sot353 hh 74hct1g86gw 5 sc-88a plastic sot353 th fig.1 pin configuration. handbook, halfpage 1 2 3 5 4 mna037 86 v cc ina outy gnd inb fig.2 logic symbol. handbook, halfpage mna038 inb ina outy 2 1 4 fig.3 iec logic symbol. handbook, halfpage 1 2 = 1 4 mna039 fig.4 logic diagram. handbook, halfpage mna040 outy inb ina
1998 aug 05 4 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 134); voltages are referenced to gnd (ground = 0 v). note 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. symbol parameter 74hc1g 74hct1g unit conditions min. typ. max. min. typ. max. v cc dc supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 v v i input voltage 0 - v cc 0 - v cc v v o output voltage 0 - v cc 0 - v cc v t amb operating ambient temperature range - 40 +25 + 125 - 40 +25 +125 c see dc and ac characteristics per device t r ,t f input rise and fall times except for schmitt-trigger inputs -- 1000 --- ns v cc = 2.0 v -- 500 -- 500 ns v cc = 4.5 v -- 400 --- ns v cc = 6.0 v symbol parameter conditions min. max. unit v cc dc supply voltage - 0.5 +7.0 v i ik dc input diode current v i <- 0.5 or v i > v cc + 0.5 v; note 1 - 20 ma i ok dc output diode current v o <- 0.5 or v o > v cc + 0.5 v; note 1 - 20 ma i o dc output source or sink current standard outputs - 0.5 v < v o < v cc + 0.5 v; note 1 - 12.5 ma i cc dc v cc or gnd current for types with standard outputs note 1 - 25 ma t stg storage temperature range - 65 +150 c p d power dissipation per package for temperature range: - 40 to +125 c 5 pins plastic sc-88a above +55 c derate linearly with 2.5 mw/k - 200 mw
1998 aug 05 5 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 dc characteristics for the 74hc1g over recommended operating conditions; voltages are referenced to gnd (ground = 0 v). note 1. all typical values are measured at t amb =25 c. symbol parameter t amb ( c) unit test conditions - 40 to +85 - 40 to +125 v cc (v) other min. typ. (1) max. min. max. v ih high-level input voltage 1.5 1.2 - 1.5 - v 2.0 3.15 2.4 - 3.15 - v 4.5 4.2 3.2 - 4.2 - v 6.0 v il low-level input voltage - 0.8 0.5 - 0.5 v 2.0 - 2.1 1.35 - 1.35 v 4.5 - 2.8 1.8 - 1.8 v 6.0 v oh high-level output voltage; all outputs 1.9 2.0 - 1.9 - v 2.0 v i =v ih or v il ; - i o =20 m a 4.4 4.5 - 4.4 - v 4.5 5.9 6.0 - 5.9 - v 6.0 v oh high-level output voltage; standard outputs 4.13 4.32 - 3.7 - v 4.5 v i =v ih or v il ; - i o = 2.0 ma 5.63 5.81 - 5.2 - v 6.0 v i =v ih or v il ; - i o = 2.6 ma v ol low-level output voltage; all outputs - 0 0.1 - 0.1 v 2.0 v i =v ih or v il ; i o =20 m a - 0 0.1 - 0.1 v 4.5 - 0 0.1 - 0.1 v 6.0 v ol low-level output voltage; standard outputs - 0.15 0.33 - 0.4 v 4.5 v i =v ih or v il ; i o = 2.0 ma - 0.16 0.33 - 0.4 v 6.0 v i =v ih or v il ; i o = 2.6 ma i i input leakage current -- 1.0 - 1.0 m a 6.0 v i =v cc or gnd i cc quiescent supply current -- 10 - 20 m a 6.0 v i =v cc or gnd; i o =0
1998 aug 05 6 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 dc characteristics for the 74hct1g over recommended operating conditions; voltages are referenced to gnd (ground = 0 v). note 1. all typical values are measured at t amb =25 c. symbol parameter t amb ( c) unit test conditions - 40 to +85 - 40 to +125 v cc (v) other min. typ. (1) max. min. max. v ih high-level input voltage 2.0 1.6 - 2.0 - v 4.5 to 5.5 v il low-level input voltage - 1.2 0.8 - 0.8 v 4.5 to 5.5 v oh high-level output voltage; all outputs 4.4 4.5 - 4.4 - v 4.5 v i =v ih or v il ; - i o =20 m a v oh high-level output voltage; standard outputs 4.13 4.32 - 3.7 - v 4.5 v i =v ih or v il ; - i o = 2.0 ma v ol low-level output voltage; all outputs - 0 0.1 - 0.1 v 4.5 v i =v ih or v il ; i o =20 m a v ol low-level output voltage; standard outputs - 0.15 0.33 - 0.4 v 4.5 v i =v ih or v il ; i o = 2.0 ma i i input leakage current -- 1.0 - 1.0 m a 5.5 v i =v cc or gnd i cc quiescent supply current -- 10.0 - 20.0 m a 5.5 v i =v cc or gnd; i o =0 d i cc additional supply current per input -- 500 - 850 m a 4.5 to 5.5 v i =v cc - 2.1 v; i o =0
1998 aug 05 7 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 ac characteristics for 74hc1g86 gnd = 0 v; t r =t f = 6.0 ns; c l =50pf. note 1. all typical values are measured at t amb =25 c. ac characteristics for 74hct1g86 gnd = 0 v; t r =t f = 6.0 ns; c l =50pf. note 1. all typical values are measured at t amb =25 c. symbol parameter t amb ( c) unit test conditions - 40 to +85 - 40 to +125 v cc (v) waveforms min. typ. (1) max. min. max. t phl /t plh propagation delay ina, inb to outy - 22 115 - 135 ns 2.0 see figs 5 and 6 - 11 23 - 27 ns 4.5 - 920 - 23 ns 6.0 symbol parameter t amb ( c) unit test conditions - 40 to +85 - 40 to +125 v cc (v) waveforms min. typ. (1) max. min. max. t phl /t plh propagation delay ina, inb to outy - 13 23 - 27 ns 4.5 see figs 5 and 6
1998 aug 05 8 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 ac waveforms fig.5 the input (ina, inb) to output (outy) propagation delays. handbook, halfpage mna041 t phl t plh v m (1) v m (1) ina, inb input outy output (1) hc1g: v m =50 % ; v i = gnd to v cc ; hct1g: v m = 1.3 v; v i = gnd to 3.0 v. fig.6 load circuitry for switching times. definitions for test circuit: c l = load capacitance including jig and probe capacitance (see ac characteristics for 74hc1g86 and ac characteristics for 74hct1g86 for values). r t = termination resistance should be equal to the output impedance z o of the pulse generator. handbook, halfpage v cc v i v o mna034 d.u.t. c l 50 pf r t pulse generator
1998 aug 05 9 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 package outline references outline version european projection issue date iec jedec eiaj sot353 wb m b p d e 1 e a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 plastic surface mounted package; 5 leads sot353 unit a 1 max b p cd e (2) e 1 h e l p qy w v mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 97-02-28 sc-88a
1998 aug 05 10 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (order code 9398 652 90011). re?ow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. wave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. repairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1998 aug 05 11 philips semiconductors product speci?cation 2-input exclusive-or gate 74hc1g86; 74hct1g86 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1998 sca60 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors 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novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 printed in the netherlands 245106/00/01/pp12 date of release: 1998 aug 05 document order number: 9397 750 03668

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